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 PD - 95560
l
Advanced Process Technology Ultra Low On-Resistance l Dynamic dv/dt Rating l 175C Operating Temperature l Fast Switching l Fully Avalanche Rated l Optimized for SMPS Applications l Lead-Free Description
l
HEXFET Power MOSFET
D
IRFZ34VSPbF IRFZ34VLPBF (R)
VDSS = 60V RDS(on) = 28m
G S
Advanced HEXFET(R) Power MOSFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications.
ID = 30A
The D2Pak is a surface mount power package capable of accommodating die sizes up to HEX-4. It provides the highest power capability and the lowest possible on-resistance in any existing surface mount package. The D2 Pak is suitable for high current applications because of its low internal connection resistance and can dissipate up to 2.0W in a typical surface mount application. The through-hole version (IRFZ34VL) is available for lowprofile application.
D2Pak IRFZ34VS
TO-262 IRFZ34VL
Absolute Maximum Ratings
Parameter
ID @ TC = 25C ID @ TC = 100C IDM PD @TC = 25C VGS IAR EAR dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds
Max.
30 21 120 70 0.46 20 30 7.0 4.5 -55 to + 175 300 (1.6mm from case )
Units
A W W/C V A mJ V/ns C
Thermal Resistance
Parameter
RJC RJA Junction-to-Case Junction-to-Ambient (PCB Mounted)**
Typ.
--- ---
Max.
2.15 40
Units
C/W
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1
07/15/04
IRFZ34VS/LPbF
Electrical Characteristics @ TJ = 25C (unless otherwise specified)
V(BR)DSS
V(BR)DSS/TJ
RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LD LS Ciss Coss Crss EAS
Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Single Pulse Avalanche Energy
Min. 60 --- --- 2.0 15 --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- ---
Typ. --- 0.062 --- --- --- --- --- --- --- --- --- --- 10 65 31 40 4.5 7.5 1120 250 59 260
Max. Units Conditions --- V VGS = 0V, ID = 250A --- V/C Reference to 25C, ID = 1mA 28 m VGS = 10V, ID = 18A 4.0 V VDS = VGS, ID = 250A --- S VDS = 25V, ID = 18A 25 VDS = 60V, VGS = 0V A 250 VDS = 48V, VGS = 0V, TJ = 150C 100 VGS = 20V nA -100 VGS = -20V 49 ID = 30A 12 nC VDS = 48V 18 VGS = 10V, See Fig. 6 and 13 --- VDD = 30V --- ID = 30A ns --- RG = 12 --- VGS = 10V, See Fig. 10 Between lead, --- 6mm (0.25in.) nH G from package --- and center of die contact --- VGS = 0V --- VDS = 25V --- pF = 1.0MHz, See Fig. 5 81 mJ
D
S
Source-Drain Ratings and Characteristics
IS
ISM
VSD trr Qrr ton Notes:
Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time
Min. Typ. Max. Units
Conditions D MOSFET symbol 30 --- --- showing the A G integral reverse --- --- 120 S p-n junction diode. --- --- 1.6 V TJ = 25C, IS = 30A, VGS = 0V --- 70 110 ns TJ = 25C, IF = 30A --- 99 150 nC di/dt = 100A/s Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 ) Starting TJ = 25C, L = 180H RG = 25, IAS = 30A. (See Figure 12) ISD 30A, di/dt 250A/s, VDD V(BR)DSS, TJ 175C
Pulse width 400s; duty cycle 2%. Uses IRFZ34V data and test conditions.
** When mounted on 1" square PCB (FR-4 or G-10 Material ). For recommended footprint and soldering techniques refer to application note #AN-994.
2
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IRFZ34VS/LPbF
1000
VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP
1000
I D , Drain-to-Source Current (A)
I D , Drain-to-Source Current (A)
VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP
100
100
10
10
4.5V
4.5V
20s PULSE WIDTH TJ = 25 C
1 10 100
1 0.1
1 0.1
20s PULSE WIDTH TJ = 175 C
1 10 100
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
3.5
RDS(on) , Drain-to-Source On Resistance (Normalized)
ID = 30A
I D , Drain-to-Source Current (A)
3.0 2.5 2.0 1.5 1.0 0.5 0.0 -60 -40 -20 0
TJ = 25 C
100
TJ = 175 C
10
1 4 5 6 7
V DS = 50V 20s PULSE WIDTH 8 9 10 11
VGS = 10V
20 40 60 80 100 120 140 160 180
VGS , Gate-to-Source Voltage (V)
TJ , Junction Temperature ( C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
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3
IRFZ34VS/LPbF
2000
VGS , Gate-to-Source Voltage (V)
1600
VGS = 0V, f = 1MHz Ciss = Cgs + Cgd , Cds SHORTED Crss = Cgd Coss = Cds + Cgd
20
ID = 30A VDS = 48V VDS = 30V VDS = 12V
16
C, Capacitance (pF)
1200
Ciss
12
800
8
400
Coss Crss
4
0
1
10
100
0 0 10 20
FOR TEST CIRCUIT SEE FIGURE 13
30 40 50
VDS , Drain-to-Source Voltage (V)
QG , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
1000
1000
ISD , Reverse Drain Current (A)
OPERATION IN THIS AREA LIMITED BY RDS(on)
TJ = 175 C
10
ID , Drain Current (A)
100
100 10us
100us 10 1ms
TJ = 25 C
1
0.1 0.0
V GS = 0 V
0.4 0.8 1.2 1.6 2.0
1 1
TC = 25 C TJ = 175 C Single Pulse
10
10ms 100 1000
VSD ,Source-to-Drain Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
4
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IRFZ34VS/LPbF
30
VDS
25
RD
VGS RG
D.U.T.
+
ID , Drain Current (A)
20
-VDD
10V
15
Pulse Width 1 s Duty Factor 0.1 %
10
Fig 10a. Switching Time Test Circuit
VDS 90%
5
0 25 50 75 100 125 150 175
TC , Case Temperature ( C)
10% VGS
td(on) tr t d(off) tf
Fig 9. Maximum Drain Current Vs. Case Temperature
Fig 10b. Switching Time Waveforms
10
Thermal Response (Z thJC )
1
D = 0.50 0.20 0.10 0.05 PDM SINGLE PULSE (THERMAL RESPONSE) t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.0001 0.001 0.01 0.1
0.1
0.02 0.01
0.01 0.00001
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRFZ34VS/LPbF
15V
EAS , Single Pulse Avalanche Energy (mJ)
160
TOP BOTTOM
120
VDS
L
DRIVER
ID 12A 21A 30A
RG
20V
D.U.T
IAS tp
+ V - DD
A
80
0.01
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS tp
40
0 25 50 75 100 125 150 175
Starting TJ , Junction Temperature ( C)
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
I AS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator Same Type as D.U.T.
50K
QG
12V
.2F .3F
10 V
QGS VG QGD
VGS
3mA
D.U.T.
+ V - DS
IG
ID
Charge
Current Sampling Resistors
Fig 13a. Basic Gate Charge Waveform
Fig 13b. Gate Charge Test Circuit
6
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IRFZ34VS/LPbF
Peak Diode Recovery dv/dt Test Circuit
D.U.T*
+
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
-
+
RG VGS * dv/dt controlled by RG * ISD controlled by Duty Factor "D" * D.U.T. - Device Under Test
+ VDD
*
Reverse Polarity of D.U.T for P-Channel
Driver Gate Drive P.W. Period D=
P.W. Period
[VGS=10V ] ***
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
[VDD]
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
[ISD ]
*** VGS = 5.0V for Logic Level and 3V Drive Devices Fig 14. For N-channel HEXFET(R) power MOSFETs
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7
IRFZ34VS/LPbF
D2Pak Package Outline
Dimensions are shown in millimeters (inches)
D2Pak Part Marking Information
T HIS IS AN IRF 530S WIT H LOT CODE 8024 AS S EMBLE D ON WW 02, 2000 IN T HE ASS E MBLY LINE "L" Note: "P" in as s embly line pos ition indicates "Lead-F ree" INT E RNAT IONAL RECT IF IE R LOGO ASS E MBLY LOT CODE PART NUMB ER F 530S DAT E CODE YEAR 0 = 2000 WE EK 02 LINE L
OR
INTE RNAT IONAL RECT IFIE R LOGO AS S EMBLY LOT CODE PART NUMBE R F530S DAT E CODE P = DES IGNATE S LEAD-F REE PRODUCT (OPT IONAL) YEAR 0 = 2000 WEEK 02 A = AS S EMBLY S IT E CODE
8
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IRFZ34VS/LPbF
TO-262 Package Outline
Dimensions are shown in millimeters (inches)
TO-262 Part Marking Information
E XAMPLE: T HIS IS AN IRL3103L LOT CODE 1789 AS S E MB LE D ON WW 19, 1997 IN T HE AS S E MB LY LINE "C" Note: "P" in as s embly line pos ition indicates "Lead-F ree" INT E RNAT IONAL RE CT IF IE R LOGO PART NUMBE R
AS S E MB LY LOT CODE
DAT E CODE YEAR 7 = 1997 WE E K 19 LINE C
OR
INT E RNAT IONAL RE CT IF IE R LOGO PART NUMBE R DAT E CODE P = DE S IGNAT E S LEAD-FRE E PRODUCT (OPT IONAL) YE AR 7 = 1997 WEE K 19 A = AS SE MB LY S IT E CODE
AS S E MB LY LOT CODE
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9
IRFZ34VS/LPbF
D2Pak Tape & Reel Information
Dimensions are shown in millimeters (inches)
TRR
1.60 (.063) 1.50 (.059) 4.10 (.161) 3.90 (.153)
1.60 (.063) 1.50 (.059) 0.368 (.0145) 0.342 (.0135)
FEED DIRECTION 1.85 (.073)
1.65 (.065)
11.60 (.457) 11.40 (.449)
15.42 (.609) 15.22 (.601)
24.30 (.957) 23.90 (.941)
TRL
10.90 (.429) 10.70 (.421) 1.75 (.069) 1.25 (.049) 16.10 (.634) 15.90 (.626) 4.72 (.136) 4.52 (.178)
FEED DIRECTION
13.50 (.532) 12.80 (.504)
27.40 (1.079) 23.90 (.941)
4
330.00 (14.173) MAX.
60.00 (2.362) MIN.
NOTES : 1. COMFORMS TO EIA-418. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION MEASURED @ HUB. 4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
26.40 (1.039) 24.40 (.961) 3
30.40 (1.197) MAX. 4
Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR's Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.07/04
10
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